Trinamic Licenses Codasip’s Bk3 RISC-V Processor for Next Generation Motion Control Applications

Trinamic, the global leader in embedded motor and motion control, has selected Codasip's Bk3 processor for their next designs. The Bk3 is based on the open and flexible RISC-V architecture.

Brno, Czech Republic and Hamburg, Germany, 28th February 2018. - Codasip, the leading supplier of RISC-V® embedded processor IP, announced today that Trinamic, the global leader in embedded motor and motion control ICs and microsystems, has selected Codasip's Bk3 processor for its next-generation family of products.


Trinamic's products serve multiple markets including laboratory and factory automation, semiconductor manufacturing, textiles, robotics, ATMs, and vending machines - wherever reliable positioning is required. Trinamic's technology sets the performance standard for emerging high-growth markets like 3D printing, medical pumps, and security cameras.

To keep up with the pace of technological advancement, it is imperative that both time and money are spent efficiently, and this is why Trinamic joined RISC-V. Being open and free to use, RISC-V is now set to become the architecture for industry implementations, mitigating the risk of depending on a few manufacturers and closed standards.

"We chose RISC-V as the microcontroller platform for our future motion control product families. The open source character of the instruction set ensures the longevity our customers require," stated Jonas P. Proeger, Marketing Director of Trinamic. "After investigating alternatives, we determined that Codasip's Bk3 offered the ideal combination of performance and power efficiency that our applications demand. Backed by best-in-class development tools and the RISC-V ecosystem, the Bk3 is perfect for our future processing needs".

The Codasip Bk3 processor, based on the RISC-V open instruction set architecture (ISA) definition, features a single 3-stage in-order execution processor pipeline and offers optional caches, IEEE 1149.1 debug, and industry standard bus interfaces. Further, the Bk3 - like all Codasip RISC-V implementations - is fully configurable and extensible, offering great advantage over traditional, fixed-configuration processor IP cores.

"We are delighted that Trinamic has chosen Codasip to be its provider of microprocessor IP," stated Chris Jones, Codasip's Vice President of Marketing. "Trinamic is an industry leader in a demanding field with products known for precision, reliability, and efficiency. Codasip technology provides Trinamic with a robust processor solution, complete with a comprehensive high-performance software toolchain."

About Trinamic
Trinamic is the global leader in embedded motor and motion control. The key products include dedicated motion control ICs, smart motor drives, and embedded microsystems. Trinamic's engineers have decades of experience and are experts in solving real world problems, designing solutions for areas such as 3D printing, desktop manufacturing, healthcare devices, laboratory automation, and surveillance cameras.
The company was founded in 2004 in Germany and currently has subsidiaries in Tallinn, Estonia, Chicago, USA, and Shanghai, China.
For more information about Trinamic's products and technology, visit www.trinamic.com.

About Codasip
Codasip delivers leading-edge processor IP and high-level design tools that provide ASIC designers with all the advantages of the RISC-V open-standard ISA, along with the unique ability to automatically optimize the processor IP. As a founding member of the RISC-V Foundation and a long-term supplier of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded processors.
Formed in 2006 and headquartered in Brno, Czech Republic, Codasip currently has offices in the US and Europe, with representatives in Asia and Israel.
For more information about Codasip's products and services, visit www.codasip.com.

About RISC-V
RISC-V is an open, free instruction set architecture (ISA) enabling a new era of processor innovation through open standard collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
For more information, visit www.riscv.org.

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